1. Field
Exemplary embodiments of the present invention relate to a semiconductor manufacturing technology, and more particularly, to a nonvolatile memory device and a method for fabricating the same.
2. Description of the Related Art
As digital media devices advance, acquiring information becomes easy. Such digital media devices may need storage medium for storing an image, music and various data. Thus, a nonvolatile memory semiconductor has been focused on a system on chip (SOC) field according to a high integration, and major semiconductor companies have invested to reinforce the SOC technology. Especially, since the SOC represents that all system technologies are concentrated on a single semiconductor, if a system design technology is not acquired, it will be difficult to develop a nonvolatile memory semiconductor.
Meanwhile, an embedded memory is one of the most important fields in the SOC, and a flash memory is highlighted in the embedded memory field. The flash memory is classified into a floating gate type and a silicon-oxide-nitride-oxide-silicon (SONOS) type. Recently, a research and development for the SONOS type has been widely performed.
For reference, the flash memory of the SONOS type is a nonvolatile memory device, which uses a mechanism for trapping and de-trapping a charge on a trap site of a material layer (e.g., nitride layer).
FIG. 1 is a cross-sectional view illustrating a cell of a conventional nonvolatile memory device.
Referring to FIG. 1, a conventional nonvolatile memory device of SONOS type includes an isolation layer 102, an active region 103, a memory layer 107, a gate electrode 108, a gate 109, and a source region and a drain region 110.
The active region 103 is defined on the substrate 101 by the isolation layer 102. The gate 109 includes the memory layer 107 and the gate electrode 108, which are stacked on the substrate. The source region and the drain region 110 are formed on the substrate 101 under both sides of the gate 109. The memory layer 107 includes a tunnel insulating layer 104, a charge trapping layer 105 and a charge blocking layer 106, which are sequentially stacked.
Since the embedded memory is fabricated through a logic process, it may be preferable that the embedded memory is designed to exclude the addition of other processes except a predetermined logic process to prevent a characteristic deterioration that may be caused by a process variable. However, the conventional flash memory of SONOS type may need an additional process for forming the memory layer 107 to the logic process. Especially, since the memory layer 107 is used as a storage medium for storing data and needs a layer having a good quality, when a forming process of the memory layer 107 is performed, a heating stress may occur in a structure.
As a result, since the conventional nonvolatile memory forms the memory layer 107 through an additional process to the logic process, logic compatibility thereof may be lowered, and a characteristic thereof may be lowered.